[nycbug-talk] 1U Server Recommendations

Bob Ippolito bob
Wed Jan 12 20:26:50 EST 2005

On Jan 12, 2005, at 20:12, Sunny Dubey wrote:

> On Wednesday 12 January 2005 00:38, alex at pilosoft.com wrote:
>> Mutter, it's too late in the night to do thinking, I'm wrong on this 
>> one.
>> Struct members are naturally-aligned (i.e. alignment is to the data 
>> type's
>> own size, chars are not aligned at all, etc) - thus {char a,b,c;} will
>> take 3*8 bit of space on any architecture.
>> However, {char a;int *b;} will be 4+4 bytes on 32-bit and 8+8 bytes on
>> 64-bit still.
> So this is where things break down for me.
> I know video-gaming isn't exactly general computing, but I assume 
> 99.9% of the
> theories/practices carry over ...
> that being said ...
> Video game consoles always have a higher computing bits, but much 
> lower memory
> footprints.  Does that mean they are hurting themselves ?
> ie:  the Nintendo 64 (released in 1996) had a 64bit MIPS CPU and only 
> 4 megs
> of RAM.  The PlayStation2 has a 128 bit MIPS-derivative CPU with only 
> 32 megs
> of RAM.  So at any given time, they aren't acessing much memory at all.
> So by the logic above ... it would have been faster if the machines
> had stayed at 32bits ?

No.  As I said before, data isn't always stored in platform words.  The 
majority of information dealt with by a video game console is a packed 
format for geometry, textures, or sound.  A 16bit sound sample is a 
16bit sound sample, regardless of what the CPU deals with natively.. 
just as a 32 bits per pixel texture is going to be 32 bits per pixel 
whether your CPU deals in 12 or 128 bit words.

The advantage to having wider registers in your CPU is mostly because 
that means you have a wider bus.  That's why we have stuff like Altivec 
and SSE2.  These units have very large registers and a wide bus for 
dealing with lots of data -- even though for "normal" operation your 
CPU is probably dealing with 32bit or 64bit words.  With Altivec, for 
example, you can work on up to eight 32bit words in one instruction, 
because you can fit four in each Altivec register (128 bits wide).  
This means you can make certain algorithms run in *less than* 1/4th of 
the time under ideal circumstances.  So clearly, in some cases, big 
registers is a big win.


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